SMOS L1 Processor Prototype, Operational Processor and Near-Real Time Processor

The SMOS L1 Processors, and all associated contracts, have been maintained by DEIMOS Engenharia S.A., with José Barbosa as Project Engineer between 2004 and 2006 and, since 2006, as Project Manager. The consortium includes Universitat Politècnica de Catalunya (Spain), the Centre d’Etudes Spaciales de la Biosphere (France) and HARP Technologies (Finland).

The SMOS L1 Processor Prototype (L1PP) Project was initiated in 2003, during the end of SMOS Phase B, with the aim to perform several trade-off analyses on Image Reconstruction algorithms, HW&SW performances and even Discrete Global Grids effectiveness. 

The first version of L1PP was available by mid 2005, with only a limited capability of calibration processing and image reconstruction. Since then, more than 15 different SW releases have been performed, including several calibration baseline changes, specific algorithms to process the ground Image Validation Test campaign data and, finally, the Processing Launch Baseline version by the end of 2009. 

During this time, the role of the development team was very pro-active, not only implementing the algorithms recommended, but also trouble-shooting and investigating algorithm short-comings and unexpected deviations from the baseline due to the real instrument behaviour, demonstrating an excellent knowledge of the MIRAS L1 processing needs.

DEIMOS was responsible for the L1PP development and maintenance up to the end of commissioning, including the developmtnt of an API containing the streamlined L1 algorithm baseline, and which is used by the DPGS L1OP and NRTP Processors as Core algorithm SW. Deimos is also responsible for the maintenance of the SMOS Data Viewer (SDV), after inheriting this project from VEGA.

Since 2012 Deimos has become the sole responsible for all the Operational L1 Ground Segment Software, including the L1 Operational Processor, Near-Real Time Processor and all associated Pre and Post Processors. The L1 Operational Processor v620 was delivered in June 2014 and will be deployed operationally in early 2015.  

Both the Mission and all associated contracts were very recently extended up to 2017, with provision for a further extension into 2019. 

© RDA - Research and Development in Aerospace GmbH 2015